Senior/Staff Wireless Verification Engineer

Post Date

Apr 09, 2024

Location

Austin,
Texas

ZIP/Postal Code

78701
US
Jul 11, 2024 Insight Global

Job Type

Perm

Category

Computer Engineering

Req #

AXS-696226

Pay Rate

$140k - $210k (estimate)

Job Description

Meet the team



The IoT Digital Design team is a state-of-the-art IC design team focused on producing world class Wireless MCU SoCs. The architecture specification, design, verification, emulation, and implementation of the Wireless MCU SoCs are all the responsibilities of the IoT Digital team. These SoCs include an embedded CPU system with analog and digital peripherals, advanced security, advanced power management, and best in class radios to support a wide range of wireless IoT applications and standards. We strive to provide advanced technology solutions through innovation in custom RISC-V Cores and AI/ML components.



This position involves deploying modern verification methodology to short-range wireless systems. The qualified candidate should have architected Datapath intensive testbenches from scratch and taken it through all stages of execution. The candidate will interact with systems team to obtain relevant high-level models, setup testbench according to specification document, corelate models with design and provide feedback to appropriate stakeholders. Advanced DSP and communication knowledge is an added advantage.



Responsibilities



Functional and performance verification of DSP and communication blocks.

Architect and implement testbenches and verification components using UVM-based methods.

Coverage definition, implementation, and analysis.

Architect and Implement Formal Verification solutions when applicable.

Integrate, debug, and improve real-number models in the testbench.

Port relevant testbench components to higher level testbenches.

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to [email protected].

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Required Skills & Experience

Bachelor's or Master's degree in electrical and/or Computer Engineering

12+ years of experience.

Industry experience developing testbenches and verification components with SystemVerilog and UVM.

Experience using MATLAB or other high-level modeling language/tool.

Knowledge of scripting/language (Python, PERL, shell, TCL).

Knowledge of common wireless communications standards and protocols such as Bluetooth low-energy, 802.15.4 or 802.11 WiFi

Understand Verilog RTL with emphasis on DSP/math-centric designs.

Nice to Have Skills & Experience

Knowledge of the following will be a plus: signal acquisition, timing recovery, mixers, equalizers, FFTs, demodulators, FEC encoders/decoders, etc.

DSP Knowledge including sampling theory, filter design (FIR, IIR) and basic modulation scheme in digital communication, such as FSK, PSK, OFDM, etc.

Advanced Verification skills -- SVA, RNM, Formal and/or Mixed Signal verification

Technical leadership and mentoring experience.

Good written and oral communication skills.

Benefit packages for this role will start on the 31st day of employment and include medical, dental, and vision insurance, as well as HSA, FSA, and DCFSA account options, and 401k retirement account access with employer matching. Employees in this role are also entitled to paid sick leave and/or other paid time off as provided by applicable law.