Job Description
Insight Global is looking for a high‑caliber engineer with deep expertise in device characterization, test‑chip design, SPICE modeling, and device‑level reliability. In this role, you’ll take ownership of device lab operations, ensuring equipment is optimized and running flawlessly. You’ll perform a broad range of silicon device characterization, extract accurate SPICE and aging models, and help shape the foundation of our next‑generation semiconductor technologies.
If you thrive at the intersection of hands‑on lab work, modeling, and silicon physics, this is your opportunity to make a direct impact on device performance and long‑term reliability.
We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to HR@insightglobal.com.To learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy: https://insightglobal.com/workforce-privacy-policy/.
Required Skills & Experience
• Ph.D. in Electrical Engineering, Physics, or a related discipline, or a master’s degree with 3+ years of relevant experience working in semiconductor device modeling and characterization.
• Strong foundational knowledge of semiconductor device physics, especially as it relates to compact modeling across various device types.
• Proven hands‑on experience performing deep‑submicron CMOS and BCD device measurements, including use of parametric analyzers, LCR meters, and other precision instrumentation.
• Skilled in operating manual, semi‑automatic, and fully automatic probers for device‑level test and characterization.
• Familiarity with both active and passive device structures in CMOS and BCD process technologies.
• Solid understanding of device noise, mismatch behavior, and how these impact circuit‑level performance.
• Knowledge of the physics of device aging and long‑term reliability mechanisms.
• Experience designing test structures (individual devices and arrays) for silicon characterization.
- Demonstrated expertise in SPICE model generation, validation, and QA flows.
Nice to Have Skills & Experience
• Ability to stress‑test devices to evaluate post‑stress behavior and safe‑operating‑area (SOA) limits.
• Prior exposure to digital and analog design flows and broader design methodologies.
• Experience running simulations in Cadence ADE.
• Knowledge of test‑structure layout across multiple technology nodes, including advanced CMOS and BCD/HV for analog and mixed‑signal products.
- Strong coding ability in Python, Perl, or similar scripting languages to support analysis and automation.
Benefit packages for this role will start on the 1st day of employment and include medical, dental, and vision insurance, as well as HSA, FSA, and DCFSA account options, and 401k retirement account access with employer matching. Employees in this role are also entitled to paid sick leave and/or other paid time off as provided by applicable law.